We present a simple test structure (derived from the CBCM technique proposed by Sylvester et al.) that enables the selective extraction of cross-coupling capacitance between arbitrary on-chip interconnects. We discuss the silicon implementation on a 0.18um CMOS process and report preliminary experimental results

Charge-based on-chip measurement technique for the selective extraction of cross-coupling capacitances

BOGLIOLO, ALESSANDRO;
2002

Abstract

We present a simple test structure (derived from the CBCM technique proposed by Sylvester et al.) that enables the selective extraction of cross-coupling capacitance between arbitrary on-chip interconnects. We discuss the silicon implementation on a 0.18um CMOS process and report preliminary experimental results
2002
0780398211
978-078039821-4
File in questo prodotto:
Non ci sono file associati a questo prodotto.

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11576/1891700
Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus 14
  • ???jsp.display-item.citation.isi??? ND
social impact